1. Field of the Invention
This invention relates to the field of integrated circuits. More particularly, this invention relates to controlling the signal level on a signal line within an integrated circuit.
2. Description of the Prior Art
It is known to provide integrated circuits having nodes for which multiple drivers or control circuits may compete to set the signal value at those nodes. Controlling these drivers such that more than one driver does not attempt to drive the node at any given time is important since such situations would lead to contention which could cause damage and would waste power as well as having other disadvantages. For this reason it is normal to set large amounts of margin between the timings used to control the drivers to ensure that more than one driver is not trying to drive a node at any given time.
As a consequence of the non-overlapping of the drivers in time there are periods during which the node will float in signal level since it is not being actively driven. This can result in unpredictable behaviour and is undesirable. In order to address this, it is known to provide keepers or jam latches which serve to maintain at the node the last set value by the most recently enabled driver.
FIG. 1 of the accompanying drawings shows examples of such keepers and jam latches. Example (a) shows a keeper which will hold a signal line high when it has been driven high by the combined action of an inverter and a p-type transistor in a feedback arrangement. Example (b) is complementary in that it serves to hold a signal value low on a signal line once that signal line has been driven low through the combined action of an inventor and a n-type transistor. Example (c) is a jam latch which serves to hold a signal value either high or low using cross-coupled invertors.
With keepers and jam latches, when a driver is turned on seeking to change the current signal value, then the keeper or jam latch that is trying to maintain the previous value will fight against the driver. For this reason, it is normal to make keepers and jam latches with relatively weak transistors that are easily overcome by the action of the driver circuit. However, as integrated circuits are becoming smaller and using smaller processes (e.g. with circuit element feature sizes down below 90 nm), process variations, temperature ranges and voltage ranges are such that a driver may not be able to overcome a keeper or a jam latch in all situations. This type of failure can be more prominent on long capacitive and resistive signal lines. In these cases, the driver has to overcome the stored charge due to the capacitance of the line or the resistance of the line as well as fight against an active keeper or jam latch.
One approach for dealing with this problem is illustrated in FIG. 2. This shows in example (a) a version of the keeper of FIG. 1, example (a), which has been modified by the inclusion of an additional p-type transistor gated by a control signal. The control signal is used to turn off the feedback action of the keeper circuit and accordingly avoid any contention with a driver circuit. Thus, as the driver circuit starts to drive the signal line (node), the control signal is used to switch off the keeper for that signal line. Example (b) of FIG. 2 shows a modified version of the FIG. 1, example (b) circuit in this case modified by the addition of an n-type transistor controlled by a control signal generated in a co-ordinated fashion with a driver seeking to drive the signal line.
FIG. 3 shows an example (a) of a latch formed as a pass gate associated with a cross-coupled pair of invertors. When the pass gate is closed, the cross-coupled pair of invertors will hold whatever high or low signal they are currently storing. When the pass gate is opened, the cross-coupled invertors need to be overcome if a new signal value is to be written into the latch. An improved circuit is shown in Example (b) in which when the pass gate is opened so that the latch can be written, the feedback to the cross-coupled invertors is switched off so that the cross-coupled invertors no longer fight against any new signal value being driven in through the pass gate.
FIG. 4 shows an example in which a long resistive signal line 2 carries a signal value. A driver 4 at one location on the signal line 2 is used to drive the signal line 2 high. A driver 6 at a separate location on the signal line 2 is used to drive the signal value on the signal line 2 low. A jam latch 8 is provided in the central portion of the signal line 2 to maintain the signal value last driven to the signal line 2. It will be appreciated that the signal line 2 may be relatively long in the context of an integrated circuit such that the drivers 4, 6 are separated from one another and have many other circuit elements disposed therebetween. The signal line 2 can be used to communicate a signal value between different locations within the integrated circuit and these can span a considerable portion of the integrated circuit. For this reason, the technique of FIG. 3, example (b) is difficult to apply in this situation since routing control signals to the jam latch 8 would consume a disadvantageous amount of overhead in terms of circuit area and circuit routing space. The signal line 2 would need to be accompanied by signal lines indicating to the jam latch 8 whether the driver 4 was active or whether the driver 6 was active such that the jam latch 8 could be temporarily disabled.